PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware Architecture

Data acquisition for monitoring the spiky activity of large-scale SNN hardware architectures are a challenge due to their time constraints, complexity, large logic size, and so on. This paper presents a versatile PSoC-Based Data Acquisition prototype, where a specialized Master Device is used for th...

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Автор: Zapata, Mireya (author)
Інші автори: Balaji, Upasana (author), Madrenas, Jordi (author)
Формат: article
Мова:eng
Опубліковано: 2018
Онлайн доступ:https://ieeexplore.ieee.org/document/8580286
https://hdl.handle.net/20.500.14809/3439
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author Zapata, Mireya
author2 Balaji, Upasana
Madrenas, Jordi
author2_role author
author
author_facet Zapata, Mireya
Balaji, Upasana
Madrenas, Jordi
author_role author
collection Repositorio Universidad Tecnológica Indoamérica
dc.creator.none.fl_str_mv Zapata, Mireya
Balaji, Upasana
Madrenas, Jordi
dc.date.none.fl_str_mv 2018
2022-06-30T16:31:11Z
2022-06-30T16:31:11Z
dc.identifier.none.fl_str_mv https://ieeexplore.ieee.org/document/8580286
https://hdl.handle.net/20.500.14809/3439
dc.language.none.fl_str_mv eng
dc.publisher.none.fl_str_mv 2018 IEEE 3rd Ecuador Technical Chapters Meeting, ETCM 2018. 17 December 2018. 3rd IEEE Ecuador Technical Chapters Meeting, ETCM 2018. Cuenca. 15 October 2018 through 19 October 2018
dc.rights.none.fl_str_mv https://creativecommons.org/licenses/by/4.0/
info:eu-repo/semantics/openAccess
dc.source.none.fl_str_mv reponame:Repositorio Universidad Tecnológica Indoamérica
instname:Universidad Tecnológica Indoamérica
instacron:UTI
dc.title.none.fl_str_mv PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware Architecture
dc.type.none.fl_str_mv info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/article
description Data acquisition for monitoring the spiky activity of large-scale SNN hardware architectures are a challenge due to their time constraints, complexity, large logic size, and so on. This paper presents a versatile PSoC-Based Data Acquisition prototype, where a specialized Master Device is used for this purpose. It benefits from the heterogeneous nature of SoC platforms that allows it to host programmable logic together with a hard-core ARM processor integrating memory and a variety of peripherals in a single chip. The presented design enables monitoring the performance of a multi-chip neural network through a single Ethernet interface in a hardware and software co-design, which is combined with an application developed in Python that allows the visualization on the PC of a dynamic raster plot of neural activity. In addition, an example of full platform functionality is shown. © 2018 IEEE.
eu_rights_str_mv openAccess
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oai_identifier_str oai:repositorio.uti.edu.ec:20.500.14809/3439
publishDate 2018
publisher.none.fl_str_mv 2018 IEEE 3rd Ecuador Technical Chapters Meeting, ETCM 2018. 17 December 2018. 3rd IEEE Ecuador Technical Chapters Meeting, ETCM 2018. Cuenca. 15 October 2018 through 19 October 2018
reponame_str Repositorio Universidad Tecnológica Indoamérica
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repository.name.fl_str_mv Repositorio Universidad Tecnológica Indoamérica - Universidad Tecnológica Indoamérica
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spelling PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware ArchitectureZapata, MireyaBalaji, UpasanaMadrenas, JordiData acquisition for monitoring the spiky activity of large-scale SNN hardware architectures are a challenge due to their time constraints, complexity, large logic size, and so on. This paper presents a versatile PSoC-Based Data Acquisition prototype, where a specialized Master Device is used for this purpose. It benefits from the heterogeneous nature of SoC platforms that allows it to host programmable logic together with a hard-core ARM processor integrating memory and a variety of peripherals in a single chip. The presented design enables monitoring the performance of a multi-chip neural network through a single Ethernet interface in a hardware and software co-design, which is combined with an application developed in Python that allows the visualization on the PC of a dynamic raster plot of neural activity. In addition, an example of full platform functionality is shown. © 2018 IEEE.2018 IEEE 3rd Ecuador Technical Chapters Meeting, ETCM 2018. 17 December 2018. 3rd IEEE Ecuador Technical Chapters Meeting, ETCM 2018. Cuenca. 15 October 2018 through 19 October 20182022-06-30T16:31:11Z2022-06-30T16:31:11Z2018info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articlehttps://ieeexplore.ieee.org/document/8580286https://hdl.handle.net/20.500.14809/3439enghttps://creativecommons.org/licenses/by/4.0/info:eu-repo/semantics/openAccessreponame:Repositorio Universidad Tecnológica Indoaméricainstname:Universidad Tecnológica Indoaméricainstacron:UTI2022-07-09T16:25:11Zoai:repositorio.uti.edu.ec:20.500.14809/3439Institucionalhttps://repositorio.uti.edu.ec/Institución privadahttps://indoamerica.edu.ec/https://repositorio.uti.edu.ec/oai.Ecuador...opendoar:02022-07-09T16:25:11Repositorio Universidad Tecnológica Indoamérica - Universidad Tecnológica Indoaméricafalse
spellingShingle PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware Architecture
Zapata, Mireya
status_str publishedVersion
title PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware Architecture
title_full PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware Architecture
title_fullStr PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware Architecture
title_full_unstemmed PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware Architecture
title_short PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware Architecture
title_sort PSoC-Based Real-Time Data Acquisition for a Scalable Spiking Neural Network Hardware Architecture
url https://ieeexplore.ieee.org/document/8580286
https://hdl.handle.net/20.500.14809/3439