All digital timing recovery and FPGA implementation

Clock and data recovery CDR is an important subsystem of every communication device since the receiver must recover the exact transmitter’s clock information usually coded into the incoming stream. Some analogue techniques for CDR have been developed based on PLL theory employing an external VCO. Ho...

• Главный автор: Arévalo Bermeo, Germán Vicente (author)
• Другие авторы: Cárdenas López, Daniel Felipe (author)
• Формат: article
• Язык: eng
• Опубликовано: 2010
• Предметы: DSP; INTERFACES (COMPUTADORES)
• Online-ссылка: http://bibdigital.epn.edu.ec/handle/15000/3705